1. Field of the Invention
The present invention is directed to a substrate, more specifically to a coreless substrate and a manufacturing method thereof.
2. Description of the Related Art
As mobile phones, personal digital assistants (PDA), thin film transistor liquid crystal displays (TFT LCD) and many other electronic devices get smaller these days, the semiconductor devices that are installed in these devices are also getting smaller, thinner and lighter.
To keep up with this trend, flexible printed circuit boards (FPC), such as tape carrier packages (TCP) and chips on film (COF), in which a circuit pattern is formed on a base film, are used as a circuit board. Used for a semiconductor device package is the TAB (tape automated bonding) method, by which a pre-formed bump electrode and a circuit pattern, which is formed on a tape circuit board, are collectively bonded to a semiconductor device and the semiconductor device is mounted on the tape circuit board.
In the prior art, in order to reduce the warpage of a high-performance package substrate, a copper clad laminate core (epoxy-resin-impregnated glass fiber fabric, both sides of which are adhered with a copper foil) with a thickness of about 0.8 mm is used. In other words, the semiconductor package substrate of the prior art is a copper clad laminate on which a build-up layer is additionally formed.
FIG. 1 is the sectional view of a semiconductor package substrate with a thick core layer in accordance with the prior art. Referring to FIG. 1, the semiconductor package substrate of the prior art comprises a core layer 110 of the copper clad laminate (CCL), a circuit 130 and an interstitial via hole 120.
The core layer 110 of the CCL is generally about 400 μm˜800 μm thick, and the insulating layer laminated on the core layer 110 of the CCL is about 30 μm˜40 μm thick. Using a thick core layer 110 of the CCL may reduce the warpage problem but is hardly feasible for reducing the size of the inner via hole (IVH), which is imperative for making a high-performance package substrate. The diameter for the IVH, for electrical connection between the layers, is about 100 μm. This kind of IVH is usually formed by use of a CNC drill.
FIG. 2 is a graph illustrating the noise corresponding to the diameter of an IVH formed on the semiconductor-package substrate. Referring to FIG. 2, the x-axis indicates the frequency of the signal (unit: GHz) while the y-axis indicates the noise (unit: dB).
In the frequency band of a general signal, which is 0˜6 GHz, the smaller the radius of the IVH is, the smaller the noise becomes. Thus, the diameter of the IVH must be reduced in order to improve the signal delivery characteristic of the package substrate. With a thick CCL core, however, forming a small-diameter IVH is technically very difficult. Since the IVH is formed using a CNC drill, the diameter of which is about 100 μm˜350 μm, there is limitation to how much the diameter can be reduced. Although reducing the diameter is possible, the process is very costly.